A vector network analyzer (“VNA”) is used to characterize the behavior of an electrical device over a band of frequencies. Because of mismatches and leakage, it is not currently possible to directly measure a device under test (“DUT”) at high frequencies without calibration of the VNA. Errors exist in any measurement using a VNA. These measurement errors contribute to the uncertainty of the measurement attributable only to the DUT. By quantifying these measurement errors, their effects can be mathematically removed from the measurement to yield characterization parameters for the device itself. As one of ordinary skill in the art can appreciate, the better the quantification of the measurement errors, the better the ability to remove their effects on the device characterization. Measurement errors in the VNA can be separated into two categories: random errors and systematic errors. Random errors are non-repeatable measurement variations due to noise and temperature changes. Random errors are unpredictable and are difficult to adequately quantify. Systematic errors are repeatable measurement variations in the VNA test-set hardware. Systematic errors are predictable and are possible to quantify and mathematically remove. Systematic errors are the most significant source of VNA measurement uncertainty in the characterization of a device. Therefore, it is beneficial to quantify and remove the systematic errors from the VNA measurements. Conventionally, quantification of the systematic errors is achieved through a VNA calibration. By connecting a number of known calibration artifacts to ports of the VNA, one can measure the calibration artifacts, compare the measured results against known results, and then algorithmically extract systematic error coefficients from the contribution made to the measurement from the known calibration device. Measurements of an unknown device, thereafter, use the systematic error coefficients to mathematically extract the characteristics attributable only to the DUT.
There are a number of calibration procedures available for a 2-port VNA. Calibration methods are named after the group of calibration standards used to extract systematic error coefficients. Some of the more common methods use short, open, load and through calibration standards (“SOLT”), through, reflect, and line calibration standards (“TRL”) and a series of electronic loads used as calibration standards (“electronic calibration” or “Ecal”).
A preferred method in metrology laboratories is the TRL calibration. It is preferred because it achieves the most accurate assessment of the systematic errors. This is due to the use of an airline standard that can be manufactured very precisely. Additionally, there is no need to know the magnitude of the reflection coefficient of the “reflect” calibration artifact and no need to know the delay of the “line” calibration artifact. Better measurement accuracy in a manufacturing environment provides better feedback in product process control as well as more accurate statistical models for the product cost analysis. Better measurement accuracy in a research and engineering environment provides a more accurate device model permitting simulators to more accurately predict behavior of the product in the context of a circuit.
U.S. patent application Ser. No. 10/098,040 having priority date Sep. 18, 2000 entitled “Method and Apparatus for Linear Characterization of Multiterminal Single-ended or Balanced Devices” (herein “the '040 patent application Ser. No. ”), and other U.S. Patent Applications claiming priority from the same Provisional Application, disclose a method and apparatus for an SOLT calibration applicable to multiport devices. With specific reference to FIG. 1 of the drawings, there is shown a system block diagram of a 4-port VNA 100 connected to a device under test 101 (“DUT”) as described by the '040 Patent Application in which a single reference channel 102 and two test channels, first test channel 111 (“A”) and second test channel 112 (“B”), are deployed. The reference channel 102 samples the incident signal, generated by signal generator 105, through a reference channel sampler 110 placed in series between the signal generator 105 and source transfer switch 106. The source transfer switch 106 electrically connects the signal generator 105 to a first signal path 107 or a second signal path 108. The source transfer switch 106 terminates the signal path 107 or 108 that is not connected to the signal generator 105 in a source transfer characteristic impedance 109. A switching network 150 provides for a connection of the first or second test channel 111, 112 to one of 2N measurement ports 1031, through 1032N. The switching network 150 is taught in the '040 Patent Application, the teachings of which are hereby incorporated by reference.
The first and second test channels 111, 112 measure the scattered reflected and transmitted signals from one of the measurement ports 103 connected to the DUT 101 in response to the stimulus from the signal generator 105. The test set-up of FIG. 1 provides for a complete SOLT calibration methodology. There is a need, however, for a more accurate method of device characterization. Under the prior art, the TRL calibration method provides for improved calibration accuracy, but is applicable only to 2 port devices. There is a need, therefore, for a method and apparatus for more accurate calibration and measurement of multiport devices.